A typical optical receiver (Rx) includes at least one photodiode that detects an optical signal and converts it into an electrical current signal and at least one transimpedance amplifier (TIA) that converts the electrical current signal into an electrical voltage signal. The photodetector, which is typically a P-intrinsic-N (PIN) photodiode, produces an electrical current signal in response to light detected by the photodetector. The TIA converts this electrical current signal into an output voltage signal having some gain, commonly referred to as transimpedance gain. The TIA circuit typically includes several control loops for improving performance, such as a direct current (DC) offset correction loop, an automatic gain control (AGC) loop, and a TIA feedback impedance adjustment loop.
FTTH Passive Optical Networks (PON) using Packet-based systems require burst-mode receivers that amplify input data instantaneously for each asynchronous packet. Currently, burst-mode PON receivers have the two standards: Institute of Electrical and Electronics Engineers (IEEE) Ethernet Passive Optical Netwoork (IEEE EPON) and International Telecommunication Union (ITU-T) Gigabit-capable Passive Optical Networks (GPON). The IEEE EPON standard uses data rates of 1.25 Gigabits per second (Gb/s) and 10.05 Gb/s, whereas GPON uses 2.5 Gb/s and 9.95 Gb/s.
There are multiple challenges in designing burst-mode PON Receivers. One of the challenges involves receiver (Rx) Sensitivity. PON networks suffer from higher losses and hence require higher optical power budgets. As a result, the Rx sensitivity requirement is less than −28 decibel-milliwatts (dbm) at a data rate of 1.25 Gbps. To achieve such low Rx sensitivity values, the TIA needs to either have very low input-referred noise or very high gain, both of which are difficult requirements to meet.
Another challenge in designing burst-mode PON receivers is that they need to have a wide dynamic range (typically greater than around 22 db for 10 G EPON) due to the higher optical power budget requirement. Hence, the TIA gain has to be decreased under overload conditions when the input power is high and increased when the input power is very low (at sensitivity).
Another challenge in designing burst-mode PON receivers is enabling the receiver to perform burst-mode synchronization very quickly. Burst-mode PON receivers are packet based, which means they receive fixed-length asynchronous data bits. Each packet is broken down into preamble bits and payload bits. Rx synchronization must be performed during the preamble bit period, which is very short, e.g., less than 100 nanoseconds (ns) in case of GPON. Hence, a very fast synchronization scheme is needed that is capable of settling the TIA output to the correct amplitude before the output is sampled and retimed by the Clock and Data Recovery (CDR) circuit that follows the TIA.
Yet another challenge in designing today's burst-mode PON receivers is that they have to be capable of supporting multiple data rate operations. For example, the EPON burst-mode receiver can be required to provide an upstream burst data rate of 10.0 Gbps and a downstream burst data rate of 1.25 Gbps.
Accordingly, a need exists for a burst-mode TIA circuit that meets all of these design challenges.